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CD4027 - Dual JK Flip FlopIntroduction : CD4027 Dual JK Flip Flop monolithic complementary MOS (CMOS) integrated circuits constructed with N and P channel enhancement mode transistors. Each flip flop has independent J, K, set, reset, and clock inputs and buffered Q and Q outputs. These flip flops are edge sensitive to the clock input and change state on the positive going transition of the clock pulses. Set or reset is independent of the clock and is accomplished by a high
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Introduction :
CD4027 - Dual JK Flip Flop monolithic complementary MOS (CMOS) integrated circuits constructed with N- and P-channel enhancement mode transistors.
Each flip-flop has independent J, K, set, reset, and clock inputs and buffered Q and Q outputs. These flip-flops are edge sensitive to the clock input and change state on the positive-going transition of the clock pulses.
Set or reset is independent of the clock and is accomplished by a high level on the respective input.
All inputs are protected against damage due to static discharge by diode clamps to VDD and VSS.
Features :
- Wide supply voltage range: 3.0V to 15V
- High noise immunity: 0.45 VDD (typ.)
- Low power TTL compatibility: Fan out of 2 driving 74L or 1 driving 74LS
- Low power: 50 nW (typ.)
- Medium speed operation: 12 MHz (typ.) with 10V supply
- This is a Thru-Hole Device
CD4027 - Dual JK Flip Flop
Item no
:
14926303261
US$ 25.00
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Min. order:
1piece
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Ships within 48 hours · Estimated delivery Jun 28 - Jul 3
US$40
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